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类型 应用研究 预答辩日期 2018-01-10
开始(开题)日期 2016-10-23 论文结束日期 2017-11-14
地点 逸夫科技馆北四楼403室 论文选题来源 与港、澳、台合作研究项目    论文字数 5.5 (万字)
题目 厚膜SOI基高压横向IGBT器件研究
主题词 SOI-LIGBT,高压互连线,电流密度,鲁棒性,关断速度
摘要 单片智能功率芯片是一种功能与结构高度集成化的高低压兼容芯片,其内部集成了高压功率器件、高低压转换电路及低压逻辑控制电路等。目前,被广泛应用于智能家电、新能源交通工具及智能机器人等高端领域,成为以上系统的核心元件之一。厚膜绝缘体上硅(Silicon On Insulator,SOI)工艺具有寄生参数小、隔离性能好及便于实现高低压集成等优点,成为单片智能功率芯片的首选工艺。在单片智能功率芯片中,基于厚膜SOI的高压横向绝缘栅极场效应晶体管(Lateral Insulated Gate Bipolar Transistor,LIGBT)被用作开关器件,是该芯片中的核心器件。本文针对高压厚膜SOI-LIGBT器件的关态、导通态、开关过程的特性与鲁棒性进行了深入、系统性的研究。主要研究成果如下: 1. 在单片智能功率芯片中,高侧和低侧的高压SOI-LIGBT器件需要通过互连线来实现信号的传递,为了避免高压互连线造成的器件提前击穿,本文研究了高压互连线导致器件击穿电压下降的机理,提出了一种双沟槽高压互连线屏蔽技术。该技术采用双沟槽进行耐压,避免了在硅表面形成电场集中。实验结果表明,该技术可100%屏蔽高压互连线对击穿电压的影响,同时高压互连线下方的硅区域长度缩短了66.7%,有效节省了芯片面积。相关成果发表在IEEE Electron Device Letters及Solid-State Electronics期刊上。 2. 为了降低芯片面积,大电流能力的高压SOI-LIGBT器件必不可少。本文提出了一种提升电流能力的U型沟道技术,该技术增大了注入到漂移区中的电子电流,且电子电流主要在硅表面流动,避免了多沟道技术的缺点。实验结果表明,采用U型沟道技术,SOI-LIGBT器件的电流密度提升了177%,同时闩锁电压达到了500V。相关成果发表在IEEE Transactions on Electron Devices期刊上。 3. 为了消除电流能力提升对器件关断与短路鲁棒性造成的不良影响,本文研究了SOI-LIGBT器件在多跑道并联使用时的非一致关断行为,指出关断失效的根源是边界隔离沟槽所引起的非一致耗尽行为;本文通过在各跑道之间设置隔离沟槽,解决了器件关断失效的难题,改进后的SOI-LIGBT器件可在450V、饱和电流下正常关断。同时,本文还研究了SOI-LIGBT器件的短路特性,提出了一种双沟槽栅极U型沟道SOI-LIGBT器件,在短路电流密度为590A/cm2时,器件的短路承受时间提高了49%。相关成果发表在IEEE Transactions on Electron Devices及Solid-State Electronics期刊上。 4. 为了降低单片智能功率芯片在高频工作条件下的功耗,本文提出了一种漂移区深槽氧化层耐压的快速关断技术。该技术在器件的漂移区中植入深槽氧化层,在保证耐压的同时缩短了漂移区的长度,大幅提高了的关断速度。实验结果表明,采用漂移区深槽氧化层耐压技术,SOI-LIGBT器件的关断损耗可减少59.6%。相关成果发表在IEEE Transactions on Electron Devices期刊上。
英文题目 RESEARCH ON THE HIGH-VOLTGAE LATERAL IGBT ON THICK SOI
英文主题词 SOI-LIGBT, high-voltage interconnection, current density, robustness, turn-off speed
英文摘要 Single chip intelligent power ICs, integrating high-voltage power devices, level-shifter circuit and low-voltage logic circuits, is a high and low voltage compatible IC with high integration of function and structure. Recently, the single chip intelligent power ICs, as the core component, have been widely used in the field of smart home appliance, new energy vehicles and intelligent robotics. Thick silicon on insulator (SOI) process owns low parasitic elements and excellent isolation performance. The high-voltage and low-voltage integration can be easily realized on the SOI process platform. The SOI lateral insulated gate bipolar transistor (SOI-LIGBT) used as the switching device is the key component in single chip intelligent power ICs. In this dissertation, the characteristics and ruggedness of SOI-LIGBTs in the off-state, the on-state and the switching process are systematically studied in depth. The detailed research road and achievements are concluded as follows. 1. In the single chip intelligent power ICs, the high-voltage interconnection (HVI) is required to transfer the signal between the high-side and low-side SOI-LIGBTs. In order to prevent the device from the premature breakdown, the mechanism of the breakdown voltage degeneration caused by HVI is studied and a structure with dual trenches is proposed. By employing the dual trenches structure, the electric field crowding on the silicon surface is avoided. The experiments show that the dual trenches technology can fully shield the influence of HVI and the length of the silicon region beneath the HVI can be shortened by 66.7%. The achievements have been published in IEEE Electron Device Letters and Journal of Solid-State Electronics. 2. In order to shrink the chip size, the SOI-LIGBT with high current density is essential. A SOI-LIGBT with U-shaped channel is proposed. The electron current injected into the drift region is enhanced by using the U-shaped channel. Because the electron current is mainly flow on the silicon surface, the shortcomings of the conventional dual channel technology is overcome. The experiments show that the current density of the U-shaped channel SOI-LIGBT can be enhanced by 177% while the latch-up voltage large than 500V can be obtained. The achievements have been published in IEEE Transactions on Electron Devices. 3. The enhancement of the current density could cause the non-uniform behavior during the turn-off and the degrading of the short-circuit capability. In this dissertation, the non-uniform behavior of the multi-finger SOI-LIGBT during the turn-off is studied. It is found that the non-uniform depletion behavior caused by the edge trenches could lead to the non-uniform current distribution among the fingers during the turn-off. An improved structure with trenches arranged between the adjacent fingers is proposed and the improved structure can turn-off successfully at 450V. The short-circuit characteristics of the U-shaped channel SOI-LIGBT is also been studied. A U-shaped channel SOI-LIGBT with dual trench gates is proposed. The short-circuit withstand time is prolonged by 49% at the current density of 590A/cm2. The achievements have been published in IEEE Transactions on Electron Devices and Journal of Solid-State Electronics. 4. In order to reduce the power consumption of single chip intelligent power IC, a high turn-off speed technology with deep-oxide trench (DOT) arranged in the drift region is proposed. DOTs can help to block the high voltage and the length of N-drift region of the device can be significantly reduced. The experiments show that the turn-off loss of the SOI-LIGBT can be improved by 59.6% by adopting the novel technology. The achievements have been published in IEEE Transactions on Electron Devices.
学术讨论
主办单位时间地点报告人报告主题
国家ASIC工程中心PIC研发部无锡实验室 2014年8月7日 东南大学无锡分校 张龙 围绕单片集成IPM的研究点讨论
国家ASIC工程中心PIC研发部无锡实验室 2015年3月3日 东南大学无锡分校 张龙 三维沟道Trench Gate SOI-LIGBT器件特性
国家ASIC工程中心PIC研发部无锡实验室 2016年10月12日 东南大学无锡分校 张龙 JFET Structure Design
国家ASIC工程中心PIC研发部无锡实验室 2017年5月22日 东南大学无锡分校 张龙 U-shaped器件关断失效原因分析
国家ASIC工程中心PIC研发部无锡实验室 2017年6月9日 东南大学无锡分校 张龙 Turn-off Failure in Multi-finger SOI-LIGBT Used for Single Chip Inverter ICs
国家ASIC工程中心PIC研发部无锡实验室 2017年7月21日 东南大学无锡分校 张龙 600V SOI-LIGBT器件设计
国家ASIC工程中心PIC研发部无锡实验室 2017年7月24日 东南大学无锡分校 张龙 100 PNP BJT设计报告
国家ASIC工程中心PIC研发部无锡实验室 2017年10月13日 东南大学无锡分校 张龙 深槽氧化层SOI-LIGBT器件研究
     
学术会议
会议名称时间地点本人报告本人报告题目
27th IEEE International Symposium on Power Semiconductor Devices and ICs May 12, 2015 Hong Kong A High Current Density SOI-LIGBT with Segmented Trenches in the Anode Region for Suppressing Negative Differential Regime
28th IEEE International Symposium on Power Semiconductor Devices and ICs June 16, 2016 Prague, Czech Republic A Novel High-voltage Interconnection Structure with Dual Trenches for 500V SOI-LIGBT
     
代表作
论文名称
Novel snapback-free reverse-conducting SOI-LIGBT with dual embedded diodes
A U-shaped Channel SOI-LIGBT With Dual Trenches
Low-Loss SOI-LIGBT With Dual Deep-Oxide Trenches
Low-Loss SOI-LIGBT with Triple Deep-Oxide Trenches
A New High-voltage Interconnection Shielding Method for SOI Monolithic ICs
Comparison of Short-circuit Characteristics of Trench Gate and Planar Gate U-shaped Channel SOI-LIGB
Turn-off Failure in Multi-finger SOI-LIGBT Used for Single Chip Inverter ICs
Fast recovery SOI PiN diode with multiple trenches
500 V dual gate deep-oxide trench SOI-LIGBT with improved short-circuit immunity
A novel high-voltage interconnection structure with dual trenches for 500V SOI-LIGBT
A High Current Density SOI-LIGBT with Segmented Trenches in the Anode Region for Suppressing Negativ
U-shaped Channel SOI-LIGBT With Dual Trenches to Improve the Trade-off Between Saturation Voltage an
 
答辩委员会组成信息
姓名职称导师类别工作单位是否主席备注
郭宇锋 正高 教授 博导 南京邮电大学
蔡跃明 正高 教授 博导 解放军理工大学
吴建辉 正高 教授 博导 东南大学
孙伟锋 正高 教授 博导 东南大学
秦明 正高 教授 博导 东南大学
      
答辩秘书信息
姓名职称工作单位备注
李红 其他 讲师 东南大学